The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
An integrated circuit (also commonly referred to as IC, chip, or microchip) is an electronic circuit manufactured by a patterned diffusion of trace elements into the surface of a thin substrate of semiconductor material (e.g., a semiconductor die). One example of an integrated circuit chip is a system on a chip (SOC). An SOC typically integrates all components of a computer or other electronic system into a single chip. For example, an SOC can contain digital, analog, mixed-signal, and radio-frequency functions—all on a single chip substrate.
Integrated circuit devices, such as transistors, are formed on semiconductor dies having features that continue to scale in size to smaller dimensions. The shrinking dimensions of these features are challenging conventional routing configurations of power signals and/or ground signals for semiconductor dies in an electronic package assembly (or semiconductor package). For example, the routing of power signals and/or ground signals using conventional pin technologies for multiple semiconductor dies in a same semiconductor package may considerably increase manufacturing cost of the semiconductor package. In general, a semiconductor package is a metal, plastic, glass, or ceramic casing containing one or more semiconductor components (e.g., one or more semiconductor dies). Individual discrete components are typically etched in a silicon wafer before being cut and assembled in a semiconductor package. A semiconductor package generally i) provides protection against impact and corrosion, ii) holds contact pins or leads which are used to connect circuits internal to the semiconductor package to circuits external to the semiconductor package, and iii) dissipates heat produced in the semiconductor package.
FIG. 1A illustrates a conventional semiconductor package 100 that includes a single semiconductor die 102 (or chip). A central processing unit (CPU) 104 and a plurality of switches 106 (located along and/or around the periphery of the CPU 104) are integrated on the single semiconductor die 102. In the example of FIG. 1A, the plurality of switches are coupled to the CPU 104 via a metal interconnect layer 108 within the semiconductor die 102. FIG. 1B illustrates a conventional semiconductor package 108 including two separate semiconductor dies—a first semiconductor die including a switch (switch die 110) and a second semiconductor die including a CPU (CPU die 112). The switch die 110 is coupled to the CPU die 112 via a plurality of wirebonds 114. In the example of FIG. 1B, each of the switch die 110 and the CPU die 112 respectively have a power plane and a ground plane.
In both the examples of FIGS. 1A-1B, as a result of the switches being located outside of the periphery of the CPU, when power is needed for the interior circuitry within the CPU, traces or electrical connections (not illustrated) typically have to extend from the periphery of the CPU to the interior of the CPU. Power is often lost or wasted along such traces or electrical connections (due to IR drops), thus preventing a CPU from utilizing power efficiently which, in turn, affects an overall performance of the CPU. Also, in a semiconductor die including two or more CPUs, the differences in IR drops along respective traces to the CPUs can prevent the CPUs from being operated at a same voltage.
FIG. 1C illustrates a top view of a conventional semiconductor die 110. The semiconductor die 110 includes a plurality of solder bumps—including a plurality of solder bumps dedicated to handling signals (S), and a plurality of solder bumps dedicated to handling power (P). The solder bumps are typically deposited on chip pads (not shown) on the top side of a wafer during a final wafer processing step. In order to mount the semiconductor die 110 to external circuitry (e.g., a circuit board or another chip, die, or wafer), the semiconductor die 110 is flipped over so that the top side of the semiconductor die faces down, and aligned so that the pads of the semiconductor die 110 align with matching pads on the external circuit, and then the solder is flowed to complete the interconnect. This is in contrast to wire bonding, in which a chip is mounted upright and wires are used to interconnect the chip pads to external circuitry. As more devices and functionality are increasingly being implemented on a single chip, reducing the number of solder balls dedicated to handling power becomes increasingly important in terms of performance.